= Anant Agarwal
{c}
{tag=Electrical engineer}
<Anant Agarwal> is a <computer scientist> and <electrical engineer> whose work includes <computer architecture>, <multicore processors> and circuit education. MIT's departmental profile lists <computer architecture> among his research areas, while his CSAIL profile describes work involving multicore computing and authorship of a circuits textbook.<Anant Agarwal profile by MIT CSAIL>[Biography and textbook paragraph; linked MIT EECS research-area listing]{ref}
His identified https://www.eecs.mit.edu/people/anant-agarwal/[MIT faculty page] links an external https://www.eecs.mit.edu/sites/default/files/person-photos/agarwal_0.jpg[portrait of Anant Agarwal].
The MIT lecture <State and Memory by Anant Agarwal and Jeffrey Lang>, jointly credited with <Jeffrey Lang>, connects analog stored state to <computer memory>. A <capacitor> can summarize prior input by one state quantity, such as stored <electric charge> $q=Cv_C$; digital storage then adds a rule for distinguishing logical values. The slides explicitly introduce capacitor state, <zero-input response>, <zero-state response> and a one-bit memory abstraction.<State and Memory by Anant Agarwal and Jeffrey Lang>[PDF pp.3–9, State, Why memory? and Memory Abstraction]{ref}
For an original physical-memory example, let a $1\,\mathrm{nF}$ <capacitor> initially hold $3\,\mathrm V$ and leak through a $1\,\mathrm{M\Omega}$ <resistor>. With no driving input,
$$
v_C(t)=3e^{-t/(RC)}\,\mathrm V,\qquad RC=1\,\mathrm{ms}.
$$
If a stipulated readout interprets values above $2\,\mathrm V$ as the stored high state, the ideal decay reaches that threshold after
$$
t=RC\log(3/2)\approx0.4055\,\mathrm{ms}.
$$
The initial stored <electric charge> is $3\,\mathrm{nC}$, but the logical interpretation also depends on leakage, the elapsed time and the decision threshold. This is a teaching model, not a specification for a particular memory chip.
The example exposes why merely retaining some <electric charge> is different from reliably retaining a <bit>. A practical memory circuit must preserve distinguishable states over the required interval and allow the state to be read. Agarwal and Lang's lecture uses the state concept to connect the circuit's dynamics with that information-storage task.
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