Bus cycle
= Bus cycle
One clock period in a synchronous <computer bus>. A <bus transaction> can occupy several <bus cycles>. An asynchronous <computer bus> instead coordinates progress through acknowledgments, so a clock-based count requires an additional timing model.<CS152: Computer Architecture and Engineering, Fall 1999/Lecture 21: Buses and I and O>[CS152 lecture 21, slides 32–33: synchronous and asynchronous sequencing]{ref}