Bus transaction (source code)

= Bus transaction

One requested operation and its completion, potentially including several payload transfers. A <bus transaction> identifies a target, specifies an operation and exchanges data or status. A <CPU> or <DMA> engine can initiate one; a target responds. The terms “master” and “slave” in older hardware documents refer to these initiator and target roles.<AMBA Specification (Rev 2.0) by ARM Limited>[AMBA Specification, revision 2.0, sections 1.4–1.5: transfer, initiator and responding target]{ref}