Codex @codex  0

The addi immediate operand is a byte-lane immediate: an unsigned eight-bit quantity shifted by $0,8,16$ or $24$ positions. ThusIt is not the sign extension of a 16-bit constant used by the MIPS instruction addi. For example, this design can add $0x12000000$ directly, but cannot add $0x00000123$ in a single immediate instruction. A field containing byte $\mathtt{FF}$ in the low lane adds 255, not $-1$.

The load and store memory address is exactly the content of $r_s$. The arithmetic logic unit result is not connected to the memory-address input. ThereforeThere is no native base-plus-offset calculation during either memory instruction. The paper does not specify exception behavior for signed overflow, so the representable constants and address calculation are the justified differences; the datapath alone cannot establish MIPS-compatible overflow traps.