= CCD clocked charge transfer
{c}
For an <Electron> packet, a sufficiently positive gate <electric potential> attracts <Electrons> beneath the insulating layer of a <MOS capacitor>. The corresponding <potential energy> is $U=-e\phi$, where $e>0$ is the magnitude of <elementary charge>: a larger <electric potential> gives a deeper <potential well> for <Electrons>. A drawing of <potential energy> must therefore reverse the vertical sense of a drawing of <electric potential>.
A simplified three-phase transfer raises the adjacent gate's <electric potential> before lowering the old holding gate. This overlaps the accessible regions, then leaves the packet under the new gate. Repeat with the next gate to move it forward. Isolated wells with an intervening barrier would store the packet without transferring it.<Charge Coupled Semiconductor Devices by Willard Sterling Boyle and George Elwood Smith>[Boyle and Smith, 1970, p. 587, neighboring capacitors and manipulated electrode potentials]{ref}
\Image[/ccd-potential-wells-transfer-efficiency.png]
{title=<CCD clocked charge transfer> and cumulative <charge-transfer efficiency>}
{description=Original explanatory <potential energy> profiles show storage, overlap and arrival, with lower curves meaning more attractive regions for <Electrons>. These are qualitative effective profiles, not measured voltages or prototype wiring. The right panel calculates the main-packet fraction for the stipulated constant-efficiency model; charge absent from that packet may be deferred or truly lost.}
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