= Solution
An isolated nanometre-sized island has small total <capacitance> $C_\Sigma=C_S+C_D+C_G+\cdots$, so discrete charge carries appreciable <charging energy>. A simple <constant interaction model> is
$$
U_N=E_C(N-n_g)^2,\quad E_C=\frac{e^2}{2C_\Sigma},\quad
n_g=\frac{C_GV_G+Q_0+\text{other induced charges}}e.
$$
Away from charge degeneracy, adding or removing an electron costs more energy than a sufficiently small thermal/bias window supplies. \b[<Coulomb blockade> suppresses sequential tunnelling between resolved charge states.]
A <single-electron transistor> has source and drain reservoirs connected to an island through two <tunnel junctions>, plus an insulated capacitive gate. Each junction has resistance and <capacitance>; the gate shifts electrostatic energies without carrying the transport current. The original device schematic labels all components.
Require $k_BT\ll E_C$, a source–drain window below the relevant transition, and junction resistances well above $h/e^2\simeq25.8\ {\rm k\Omega}$ to suppress strong quantum charge fluctuations. Electromagnetic noise and lifetime broadening must also be small. Gate-induced charge degeneracy permits conduction even at small bias; there is no gate-independent blockade threshold. Resolving orbital levels additionally requires <temperature> and broadening below their spacing between <energy levels>.
\Image[/past-exam-of-the-mphil-in-micro-and-nanotechnology-enterprise-course-of-the-university-of-cambridge/2020/paper-2-charge-devices.png]
{title=Single-electron charging and lateral confinement of a heterostructure electron gas}
{description=Original circuit, heterostructure and gate-defined confinement schematics. The band profiles and layer thicknesses are qualitative, not material-specific measurements.}
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