= Solution
The <register file> in this <datapath> supplies both read ports combinationally for whatever read addresses the instruction fields present. Reading a <processor register> is harmless, and a result that the current <MIPS instruction> does not need can simply be ignored. Only writes require an explicit enable because writes change architectural state. There is consequently no functional need for `RegRead` in this design.
The data-memory read interface has an explicit `MemRead` enable. Non-load <MIPS instructions> can present irrelevant or invalid addresses at the memory address input; an external memory transaction should not be initiated merely because those <bits> happen to be present. An explicit enable also permits interfaces with <memory-mapped input-output>, where a read can have a side effect. It can reduce unnecessary activity even for ordinary memory.
$$
\boxed{\text{register reads are continuously available; memory reads are explicitly requested.}}
$$
This is a distinction in the supplied <datapath>, rather than a universal physical prohibition: other <register files> can have read enables, and an ideal side-effect-free memory can be modeled with continuous reads.
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