= Solution
Use three positive-edge-triggered <D flip-flops>, all driven by the same <clock signal> $CLK$. Write the current <binary representation> as $B2\,B1\,B0$, with $B0$ the <least significant bit>. The next state is the current value plus one when $A=1$ and minus one when $A=0$, in each case modulo eight. A <bit> toggles under <exclusive or> with a one.
For upward counting, $B1$ toggles when $B0=1$, while $B2$ toggles when $B1=B0=1$, the respective <carry> conditions. For downward counting the corresponding <borrow> conditions are $B0=0$ and $B1=B0=0$. Define the shared inverted direction $N=\neg A$ and the two direction-match signals
$$
T_0=B0\oplus N,\qquad T_1=B1\oplus N.
$$
Each $T_i$ is one exactly when $Bi=A$: it equals $Bi$ for upward counting and $\neg Bi$ for downward counting. Thus the <Boolean functions> for the three D inputs are
$$
\boxed{D_0=\neg B0,\qquad D_1=B1\oplus T_0,\qquad D_2=B2\oplus(T_0\land T_1).}
$$
Implement this with two <NOT gates> for $N,D_0$, four two-input <exclusive or> gates for $T_0,T_1,D_1,D_2$, and one two-input <AND gate>. Connect $D_i$ to the <D flip-flop> whose output is $Bi$; feed the three outputs back into the indicated gates. All three <flip-flops> capture simultaneously, so each equation uses the old state.
\Image[/past-exam-of-the-year-1-of-the-computer-science-course-of-the-university-of-oxford/2015/digital-main-2015-up-down-counter.png]
{title=Synchronous three-<bit> up-down <binary counter>: common <clock signal>, explicit D inputs and feedback}
For completeness, the <state transition table> is
|| Current $B2B1B0$
|| Next for $A=1$
|| Next for $A=0$
| `000`
| `001`
| `111`
| `001`
| `010`
| `000`
| `010`
| `011`
| `001`
| `011`
| `100`
| `010`
| `100`
| `101`
| `011`
| `101`
| `110`
| `100`
| `110`
| `111`
| `101`
| `111`
| `000`
| `110`
Every three-<bit> state is valid. A reset may initialize the <binary counter> to zero if required; counting itself needs no extra state. The direction input must meet the <setup time> and <hold time> requirements at the active <clock edge>.
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