= Solution
Move the no-write decision into the destination-address path. If the original destination selection produced $d$ and the original write-enable decision was $W$, drive the new register file with
$$
\boxed{\mathrm{wa}=\begin{cases}d,&W=1,\\0,&W=0.\end{cases}}
$$
A five-bit two-input <multiplexer> after the existing destination selector implements this, or the decoder can directly select among zero, the instruction's destination fields and register 31. Its control still distinguishes writing and non-writing instructions: removing the register-file enable pin does not remove that logical decision.
Read-address selection and the result-data path can remain unchanged. Instructions that formerly disabled RegWrite now select destination zero; their write data is irrelevant. Instructions writing an actual destination preserve the same address and data. Since writes to the <MIPS zero register> were already discarded, the architectural behaviour is unchanged for that case as well.
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