= Solution
Use a <three-sample run detector>. Just before <clock edge> $t$, let two stored <bits> $p$ and $q$ hold the input values at edges $t-1$ and $t-2$. Initialise both to zero. With input $a_t$, define
$$
\boxed{w_t=a_t\land p\land q,\qquad p'=a_t,\qquad q'=p.}
$$
Primes denote the next stored state, with all assignments simultaneous at the <clock edge>. The output is the <logical conjunction> of the present input and its two preceding samples. By induction on <clock edges>, the stated interpretation of $p,q$ is maintained, proving the required behaviour. Two <bits> of state suffice.
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