= PCI Express root complex
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A <PCI Express root complex> connects a host's <CPU> and <computer memory>[memory system] to a <PCI Express> hierarchy. A <PCI Express root port> originates a downstream link from that complex; one <PCI Express root complex>[root complex] can expose several such ports. <PCI Express endpoints>[Endpoints] may attach directly or through <PCI Express switches>[switches].<The PCI Express Port Bus Driver Guide HOWTO>[§2.2, Root Port and Switch Port]{ref}
For example, an <operating system> discovers a device through the hierarchy and configures resources through which the host and device communicate. Device-initiated memory transfers also depend on the platform's <address translation>[address mappings] and protection mechanisms. The <PCI Express root complex>[root complex] is the host-facing architectural component, while a switch distributes links within the hierarchy and a <PCI Express lane> is one unit of a link's physical signaling. Keeping those levels separate prevents confusing a port count with a <CPU> count or a guaranteed <bit rate>[bandwidth].
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