Solution

ID: past-exam-of-the-year-1-of-the-computer-science-course-of-the-university-of-oxford/2013/digital-systems-linear-algebra-introduction-to-formal-proof/2/d/solution

The addi immediate operand is a byte-lane immediate: an unsigned eight-bit quantity shifted by or positions. Thus
It is not the sign extension of a 16-bit constant used by the MIPS instruction addi. For example, this design can add directly, but cannot add in a single immediate instruction. A field containing byte in the low lane adds 255, not .
The load and store memory address is exactly the content of . The arithmetic logic unit result is not connected to the memory-address input. Therefore
There is no native base-plus-offset calculation during either memory instruction. The paper does not specify exception behavior for signed overflow, so the representable constants and address calculation are the justified differences; the datapath alone cannot establish MIPS-compatible overflow traps.

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