Branch delay slot
= Branch delay slot
In classic delayed-control-transfer MIPS, the instruction immediately after a branch or jump executes before control transfers. A harmless `sll $zero,$zero,0` can fill that slot. A jump-and-link records the address after this slot as its <return address>.<MIPS32 Architecture For Programmers Volume II by MIPS Technologies>[Revision 2.00, JAL entry, p. 139]{ref}