= Complementary CMOS network duality
{title2=$G_{\rm pull\text{-}up}=\neg G_{\rm pull\text{-}down}$}
For an <NMOS transistor> network described by a series-parallel expression in conducting inputs, replace series by parallel, parallel by series, and each device by a <PMOS transistor> driven by the same input. <De Morgan's laws> show recursively that the resulting <pull-up network> conducts exactly when the original <pull-down network> does not. This proves complementary rail connections for stable binary inputs in the ideal static model. Factoring a <Boolean function> before constructing its dual can remove duplicated devices: $ab\lor bc=b(a\lor c)$ needs three lower and three upper devices, instead of four of each. Physical switching transients, device sizing and delays are additional engineering questions.
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