Complementary CMOS network duality ($G_{\mathrm{pull}\text{-}\mathrm{up}}=\neg G_{\mathrm{pull}\text{-}\mathrm{down}}$)

For an NMOS transistor network described by a series-parallel expression in conducting inputs, replace series by parallel, parallel by series, and each device by a PMOS transistor driven by the same input. De Morgan's laws show recursively that the resulting pull-up network conducts exactly when the original pull-down network does not. This proves complementary rail connections for stable binary inputs in the ideal static model. Factoring a Boolean function before constructing its dual can remove duplicated devices: $ab\vee bc=b(a\vee c)$ needs three lower and three upper devices, instead of four of each. Physical switching transients, device sizing and delays are additional engineering questions.