Solution (source code)

= Solution

For data inputs $d_0,\ldots,d_7$ and selection <bits> $s_2s_1s_0$, use a three-to-eight <binary decoder>. Its output $e_i$ is the <minterm> that is one exactly when the selection equals the three-<bit> <binary representation> of $i$. For example,
$$
e_0=\neg s_2\land\neg s_1\land\neg s_0,\quad e_1=\neg s_2\land\neg s_1\land s_0,\quad e_7=s_2\land s_1\land s_0.
$$
Gate each data input with its decoded selection using an <AND gate>, then combine all eight results with an <OR gate>:
$$
\boxed{z=\bigvee_{i=0}^7(e_i\land d_i).}
$$
Exactly one $e_i$ is asserted, so $z=d_i$ for the selected $i$, regardless of the other data inputs. A direct implementation uses three shared <NOT gates>, eight three-input <AND gates> for the <binary decoder>, eight two-input <AND gates> for the data, and one eight-input <OR gate>. Equivalently, combine each decoder term with its data input in one four-input <AND gate>. Larger <logic gates> may be built from two-input ones.