For data inputs and selection bits , use a three-to-eight binary decoder. Its output is the minterm that is one exactly when the selection equals the three-bit binary representation of . For example,
Gate each data input with its decoded selection using an AND gate, then combine all eight results with an OR gate:
Exactly one is asserted, so for the selected , regardless of the other data inputs. A direct implementation uses three shared NOT gates, eight three-input AND gates for the binary decoder, eight two-input AND gates for the data, and one eight-input OR gate. Equivalently, combine each decoder term with its data input in one four-input AND gate. Larger logic gates may be built from two-input ones.

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