{title2=PPA}

https://en.wikichip.org/wiki/power-performance-area

This is the mantra of the <semiconductor industry>:
* power and area are the main limiting factors of chips, i.e., your budget:
  * chip area is ultra expensive because there are sporadic errors in the fabrication process, and each error in any part of the chip can potentially break the entire chip. Although there are 

    The percentage of working chips is called the yield.

    In some cases however, e.g. if the error only affects single CPU of a multi-core CPU, then they actually deactivate the broken CPU after testing, and sell the worse CPU cheaper with a clear branding of that: this is called binning https://www.tomshardware.com/uk/reviews/glossary-binning-definition,5892.html
  * power is a major semiconductor limit as of 2010's and onwards. If everything turns on at once, the chip would burn. Designs have to account for that.
* performance is the goal.

  Conceptually, this is basically a set of algorithms that you want your hardware to solve, each one with a respective weight of importance.

  Serial performance is fundamentally limited by the <critical path>[longest path] that electrons have to travel in a given clock cycle.

  The way to work around it is to create pipelines, splitting up single operations into multiple smaller operations, and storing intermediate results in memories.


Discussion on "Power, performance and area" by Ciro Santilli 32