Drain-induced barrier lowering

ID: drain-induced-barrier-lowering

Drain-induced barrier lowering (DIBL) is an effect observed in field-effect transistors (FETs), particularly in metal-oxide-semiconductor field-effect transistors (MOSFETs) as they are scaled down in size. DIBL occurs primarily due to the influence of the drain voltage on the potential barrier at the source-to-channel junction, impacting the channel's operation and characteristics.

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