{c}

= P51
{c}
{synonym}

Bought: 2017 for approximately 2400 <pounds> to be <Ciro Santilli>'s main personal laptop.

Specs:
* CPU: <Intel i7-7820HQ>
* screen: 15.6 inches, 16:9
* weight: 2691g (self weight in 2023)
* charger weight: 700g (self weight in 2023)

Identifiers:
* <Ethernet> <MAC address>: 54:e1:ad:b5:5b:08
* <Wi-Fi> <MAC address>: 44:03:2c:a2:27:81


Lenovo ThinkPad P51 (2017)

Ciro Santilli's hardware <span class="meta">/</span> Lenovo ThinkPad P51 (2017)

{file}

This is a quick <Microarchitectural benchmark> to try and determine how many <functional units> our CPU has that can do an `inc` instruction at the same time due to <superscalar architecture>.

The generated programs do loops like:
``
loop:
  inc %[i0];
  inc %[i1];
  inc %[i2];
  ...
  inc %[i_n];
  cmp %[max], %[i0];
  jb loop;
``
with different numbers of inc instructions.

\Image[https://raw.githubusercontent.com/cirosantilli/media/refs/heads/master/c/inc_loop_asm_n_manual.png]
{title=<c/inc_loop_asm_n.sh>{file} results for a few CPUs}
{description=
Quite clearly:
* <AMD 7840U> can run INC on 4 functional units
* <Intel i7-7820HQ> can run INC on 2 functional units
and both have low instruction count effects that destroy performance, AMD at 3 and Intel at 3 and 5. TODO it would be cool to understand those better.

Data from multiple CPUs manually collated and plotted manually with \a[../c/inc_loop_asm_n_manual.sh].
}
{height=480}

Announced at:
* https://mastodon.social/@cirosantilli/114698665154298332
* https://x.com/cirosantilli/status/1934950348663214211
* https://www.linkedin.com/feed/update/urn:li:ugcPost:7340716961170898944/


Ciro Santilli @cirosantilli 37

 Incoming links: Intel i7-7820HQ