Rajeev Alur is a prominent Indian computer scientist known for his contributions to theoretical computer science, particularly in formal verification, automata theory, and program analysis. He is a professor in the Department of Computer and Information Science at the University of Pennsylvania and has made significant contributions in the fields of model checking, temporal logic, and verification of hybrid systems. Alur has published numerous research papers and has been involved in various academic and industry projects related to software verification and systems engineering.
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