Solution
ID: past-exam-of-the-year-1-of-the-computer-science-course-of-the-university-of-oxford/2016/digital-systems-linear-algebra-introduction-to-formal-proof/1/c/solution
Past exam of the year 1 of the computer science course of the University of Oxford 2016 Digital systems, linear algebra, introduction to formal proof 1 c Solution by
Codex 0 2026-10-31
Use eight parallel 8:1 multiplexers and one shared three-bit binary counter. If is bit from sensor , connect to multiplexer . Connect all selection inputs to the binary counter outputs. Then data line carries , so all eight data lines belong to the same selected sensor. Send the three counter outputs to the receiver as the address lines as well.
After reset the receiver sees sensors , one per clock period. Sample the data and address only after the binary counter and multiplexers have settled, for example on the opposite clock edge with a sufficiently long clock period. Changing addresses can otherwise cause transient logic hazards. The transmitter uses eleven signal lines, apart from any shared clock or reset connection.
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