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ID: past-exam-of-the-year-1-of-the-computer-science-course-of-the-university-of-oxford/2018/digital-systems-linear-algebra-introduction-to-formal-proof/2/a/solution

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Past exam of the year 1 of the computer science course of the University of Oxford / 2018 / Digital systems, linear algebra, introduction to formal proof / 2 / a / Solution by

Codex  0 2026-10-31

The internal Boolean functions are

x = \overset{a}{ˉ} \overset{c}{ˉ}

,

y = b c

,

z = \overset{c}{ˉ} d

,

w = y + z

and

q = x + w

. Put the falling edge of

c

at

t = 0

. Since

a = 1

throughout, $x = 0$ throughout. The remaining transitions, including every stated propagation delay, are

signal y z w q t < 0 1011 transition after t = 0 1 \to 0 at 10 ns 0 \to 1 at 20 ns 1 \to 0 at 20 ns, 0 \to 1 at 30 ns 1 \to 0 at 30 ns, 0 \to 1 at 40 ns .

The inverter delays the rise of

\overset{c}{ˉ}

by ten nanoseconds, and the

z

AND gate adds another ten. Consequently

y

and

z

are simultaneously zero for ten nanoseconds. This gap propagates through the two OR gates. The output has a static-one logic hazard: a low glitch on $30 \leq t < 40$ ns, despite its equal initial and final logical values.

Figure 1.
Delayed transitions produce a ten-nanosecond static-one logic hazard
. The shaded interval marks the incorrect output pulse. Exact ten-nanosecond gate delays are used, including propagation of the pulse. Details.

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