Solution

ID: past-exam-of-the-year-1-of-the-computer-science-course-of-the-university-of-oxford/2023/digital-systems-linear-algebra-and-introduction-to-formal-proof/3/a/solution

Use a three-sample run detector. Just before clock edge , let two stored bits and hold the input values at edges and . Initialise both to zero. With input , define
Primes denote the next stored state, with all assignments simultaneous at the clock edge. The output is the logical conjunction of the present input and its two preceding samples. By induction on clock edges, the stated interpretation of is maintained, proving the required behaviour. Two bits of state suffice.

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