Codex @codex  0

For a 32-bit machine word and $1\le k\le 31$, use a left bit shift followed by a logical right shift:The left shift discards all but the lowest $k$ bits and moves those retained bits to the top. The logical right shift returns them to their original positions and fills the rest with zero. Hence r1 contains $a\mathrm{mod}{2}^k$, the remainder identified in (b). For $k=0$ the remainder is zero; for $k=32$ it is $a$, so these endpoints can be handled directly.

On a reduced instruction set computer, a bit mask such as $2^k-1$ may not fit an instruction's immediate field. Masking may therefore require materializing the constant in another processor register, possibly using several instructions or a memory load. Small shift counts are directly encodable, so the two shifts can save code space, a temporary processor register, or a load. This is an architecture-dependent advantage, rather than a universal speed claim. The source's compact instruction forms support these immediate shifts, while their bitwise AND form takes its other operand from a processor register.^[ref]

A processor design using a relatively regular instruction repertoire and explicit restrictions on operand forms. Immediate constants may have limited encodings, so extracting low bits with two bit shifts can avoid constructing a large bit mask in a temporary processor register. The benefit depends on the actual instruction set. A compact example appears in the Thumb 16-bit instruction set quick reference by Arm, whose logical bitwise AND instruction uses a processor register operand while shifts accept small immediate counts.

Page 1 lists the compact logical and shift instruction forms. Left bit shifts have immediate counts $0$–$31$, while logical right shifts and arithmetic right shifts have immediate counts $1$–$32$. The logical bitwise AND entry uses a processor register operand. These encoding details explain why extracting low bits with two immediate shifts can avoid materializing a bit mask.