Publisher: LWN.net.
Cited passages: Ulrich Drepper, Memory part 2: CPU caches, section 3.2: read latency can overlap other operations; Ulrich Drepper, Memory part 2: CPU caches, section 3.3.1: fully associative tag comparisons and implementation cost; Ulrich Drepper, Memory part 2: CPU caches, sections 3.2 and 3.3.1: offset, tag and fully associative lookup.

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