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For sinusoidal steady state with the $e^{i\omega t}$ convention, complex impedance is the phasor ratio $Z=\tilde{V}/\tilde{I}$, encoding both amplitude ratio and phase. From $V=LdI/dt$, an ideal inductor has $Z_L=i\omega L$; from $I=CdV/dt$, a capacitor has $Z_C=(i\omega C{)}^{-1}$.

The original diagram has $R_1,L_1$ in series, and $R_4,C_4$ in parallel. ThusWith the right supply node as the reference, the two unloaded voltage divider outputs are ${\tilde{V}}_A=V_0{R}_2/(Z_1+R_2)$ and ${\tilde{V}}_B=V_0{Z}_4/(R_3+Z_4)$. Subtracting givesThe series-RL parallel-RC bridge balance is $Z_1{Z}_4=R_2{R}_3$. Equating its real and imaginary coefficients givesThese ideal components balance the bridge at any frequency, not just the test frequency.

At $\omega =200\mathrm{rad}{\mathrm{s}}^{-1}$, the current amplitude through $R_2$ is $5/|50+50i|=0.0707\mathrm{A}$. Using peak rather than RMS supply amplitude,In the DC steady state the inductor is a short and the capacitor is open. Both dividers have equal resistors, so each midpoint is at2.5V and the bridge stays balanced. The upper-branch current is0.100A, giving $\boxed{P_{R_2,\mathrm{DC}}=0.250\mathrm{W}}$.

For the high-input-resistance voltmeter, hold the other components fixed. At the DC balance,The DC bridge resistance resolution is a local readout resolution, or0.08% of $R_1$, not a total uncertainty allowing for supply, component calibration or voltmeter loading. ^[ref]