Use phasors. The relation gives . The three branches form a parallel RLC circuit and share the source voltage. The source-current phasor and its real time dependence are
Consequently its amplitude is and its phase relative to the voltage is . At low frequency it is inductive and lags toward ; at high frequency it is capacitive and leads toward . The ideal amplitude diverges at either extreme and has a finite minimum between them; real component losses and source electrical impedance limit those asymptotes.
Figure 1.
Original normalized source-current amplitude, phase and resistor-to-source-current ratio for an illustrative ideal parallel RLC circuit
. Details.
Zero phase requires cancellation of electrical susceptances:
The inductor and capacitor currents are nonzero, equal in magnitude and opposite in phase, while the resistor supplies the in-phase source current. energy oscillates between the reactive elements; dissipation occurs in the shunt resistor. A source-current maximum would describe a different, series-resonant circuit.
The specified ratio is
It exceeds when . Define and . The two positive endpoints are , so
The endpoints have geometric mean . Increasing the parallel resistance reduces dissipative loading and narrows this band, in contrast with increasing the resistance of a series RLC circuit. Equivalently, , with and . The parallel RLC bandwidth here belongs to the explicitly defined current ratio, not a half-maximum rule applied to a source-current peak that does not exist.
When is in series with a parallel RLC circuit, the ratio of parallel-network voltage to voltage across is its impedance divided by . Its peak is , and its phase passes from through zero to as angular frequency rises through . This is not the transfer ratio relative to the total input voltage, which includes the additional series voltage drop and has peak . Identifying voltage endpoints is necessary before using the voltage divider formula.