The problem belongs to NP: an assignment in is a polynomial-length certificate in computational complexity, and substitution verifies every equation in polynomial time.
For NP-hardness, reduce the Circuit satisfiability problem. Introduce one variable in for every wire of a Boolean circuit. A logical negation gate is enforced by , and a logical conjunction gate is enforced by . For a logical disjunction gate use the suggested quadratic equation
which is equivalent to for bits . Add the linear equation for the designated output wire.
The construction introduces one variable and one equation per wire or gate, so it is a polynomial-time many-one reduction. A satisfying circuit input extends uniquely through its gates to a solution of the equations, and any solution gives a consistent accepting circuit computation. Since circuit satisfiability is NP-complete, quadratic-equation satisfiability over F2 is therefore

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