This is Ladner's theorem. Assume and let be the Boolean satisfiability problem. Enumerate all clocked polynomial-time deterministic machines as and all clocked polynomial-time candidate reductions as . A standard delayed-diagonalization schedule gives a nondecreasing, unbounded, polynomial-time computable function that increases only by one. Define
The schedule alternates two requirements. At even stage , it holds fixed while searching successively larger finite sets of strings for an on which disagrees with membership in ; after finding one it increments . At odd stage , it searches for an such that
and then increments . Length and simulation budgets are increased slowly enough that each finite search is eventually exhaustive but computing still takes polynomial time. This is achieved, for example, by permitting only simulation steps and searches on strings of logarithmic length before deciding .
Every stage must finish. If an even stage remained forever, then would eventually be a fixed even number, so and would differ on only finitely many strings. If decided , those finitely many exceptions could be hardwired to decide in P, contradicting . If an odd stage remained forever, then would eventually be odd and would be finite. A correct polynomial-time many-one reduction from to would again put in P. Thus every fails to decide , and every fails to reduce to .
Finally, : compute and, when it is even, use the usual polynomial-time certificate for satisfiability. Hence
The problem belongs to NP: an assignment in is a polynomial-length certificate in computational complexity, and substitution verifies every equation in polynomial time.
For NP-hardness, reduce the Circuit satisfiability problem. Introduce one variable in for every wire of a Boolean circuit. A logical negation gate is enforced by , and a logical conjunction gate is enforced by . For a logical disjunction gate use the suggested quadratic equation
which is equivalent to for bits . Add the linear equation for the designated output wire.
The construction introduces one variable and one equation per wire or gate, so it is a polynomial-time many-one reduction. A satisfying circuit input extends uniquely through its gates to a solution of the equations, and any solution gives a consistent accepting circuit computation. Since circuit satisfiability is NP-complete, quadratic-equation satisfiability over F2 is therefore
A decision problem is NL-complete when and every language has a deterministic logarithmic space many-one reduction to .
The directed graph reachability problem is the standard example. It lies in NL because a machine stores the current vertex and a counter, nondeterministically guesses at most successive edges, and accepts upon reaching ; this uses space. For hardness, given an NL machine and input , construct its configuration graph. Its configurations have logarithmic length, adjacency can be computed in logarithmic space, and
Adding one target joined from every accepting configuration gives the required logarithmic-space reduction.
It suffices to recognize non-reachability in NL, since directed reachability is NL-complete. Let be the number of vertices reachable from by a directed path of length at most . Clearly . The inductive counting argument computes and verifies from using logarithmic space.
For each vertex , reachability within steps has an NL certificate: guess such a path. Non-reachability within steps can be certified relative to the trusted value by enumerating vertices , exhibiting paths of length at most to exactly distinct vertices, and checking that none is or has an edge to . Because there are exactly reachable vertices, this list cannot omit a reachable predecessor. Counters, vertex names and one guessed path need only logarithmic space. Repeating this check in a fixed vertex order and counting the positive cases produces the exact .
After rounds, the procedure knows the number of all vertices reachable from . It accepts non-reachability of after certifying, by the same complete enumeration, that is absent. Thus the complement of directed reachability belongs to NL. Since every NL language reduces to reachability and log-space reductions are closed under complementation, this proves the Immerman–Szelepcsényi theorem
Membership follows from . A directed graph is not strongly connected exactly when there is a pair for which is not reachable from . Guessing the pair and using the NL procedure for non-reachability puts non-strong-connectivity in NL, hence strong connectivity is in co-NL and therefore in NL.
For NL-hardness, reduce directed reachability. Given , form by retaining all edges of , adding for every vertex , and adding for every vertex . If is reachable from in , then any reaches any in along
Conversely, if is strongly connected then reaches . A simple -to- path cannot use an added edge out of before arriving at , and every added edge into merely returns the path to its starting vertex; deleting the resulting cycle leaves an -to- path made from edges of . The construction is computable in logarithmic space, so deciding strong connectivity is
Let be a polynomial-time verifier for , with witnesses of length . Consider the prefix language
This language lies in NP, so the assumption supplies a polynomial-size circuit family deciding .
Apply the usual search-to-decision reduction. Starting with the empty prefix, append zero if the circuit says that some accepting witness has that extended prefix; otherwise append one. Repeat for positions. Composing the polynomially many copies of the decision circuit produces a polynomial-size circuit . Whenever , at least one accepting extension exists at every step, so the final string satisfies
On negative inputs the output may be arbitrary, as required.
This is the Karp–Lipton theorem. It is enough to place inside . Let , so for a polynomial-time predicate and polynomially bounded strings,
The NP search problem that receives and seeks such a has, by part (i), a polynomial-size circuit family producing a valid witness whenever one exists. For each input length there is therefore a polynomial-size circuit such that, for every relevant , existence of a witness implies .
Consequently
where the existentially guessed circuit description has polynomial length and evaluation of is polynomial time. This is a description. Hence ; complementation gives the reverse inclusion, and merging adjacent equal quantifier blocks collapses every higher level. Thus the polynomial hierarchy satisfies
Yes. The usual collapse relativizes because every machine involved receives the same oracle . Induct on the levels of the polynomial hierarchy. The hypothesis gives
If the preceding level is contained in , then its oracle queries can be simulated in polynomial time with oracle . A nondeterministic machine for the next existential level is therefore only an machine, hence a machine by hypothesis. Complements give the corresponding universal level. The induction yields
A language belongs to RP when a polynomial-time randomized algorithm rejects every and accepts every with probability at least .
Amplify the algorithm on length- inputs with independent repetitions, accepting if any repetition accepts. Its error on each positive input is at most , while it still never accepts a negative input. Choose all random bits for all repetitions in advance. By the union bound, the probability that this one fixed choice fails on at least one of the at most positive strings is at most
Thus some random string works simultaneously for every input of length . Hardwire that string into the polynomial-time computation and compile it into a Boolean circuit. The resulting polynomial-size circuit family decides , proving
First suppose . Run the RP algorithm for and the RP algorithm for its complement with fresh random bits. If the first accepts, output one; if the second accepts, output zero; otherwise repeat. Neither output can be wrong, and on every input the appropriate algorithm accepts in each round with probability at least . The number of rounds is dominated by a geometric distribution of mean two, so this is an always-correct algorithm with polynomial expected running time.
Conversely, let be always correct when it halts and have expected running time at most . Run it for steps. Markov inequality gives
Accept exactly when halts and outputs one; this is an RP algorithm for . Accepting exactly when it halts and outputs zero is an RP algorithm for the complement. Therefore
is equivalent to zero-error expected polynomial time.
We give the Agrawal–Biswas primality test, which has one-sided error. Small inputs and perfect powers can first be recognized deterministically. For every remaining integer , put and choose a uniformly random monic polynomial
Using repeated squaring in the quotient ring , test the identity
This takes time polynomial in because every intermediate polynomial has degree below .
If is prime, the intermediate binomial coefficients are divisible by , so the identity always holds. Now suppose that is composite and is not a prime power. Choose a prime divisor and write with and . Over ,
because an intermediate coefficient equal to is nonzero modulo . Hence
is a nonzero polynomial of degree below over .
Reduction of random modulo is uniform among the monic degree- polynomials. The polynomial has at most distinct monic irreducible factors of degree . On the other hand, the number of monic irreducibles of degree obeys the standard lower bound
Whenever is one of these irreducibles but does not divide , the tested congruence fails. Thus one trial detects compositeness with probability at least
after the finitely many small are handled directly. Repeating times makes the probability of missing a composite less than , while a prime is never rejected. Therefore compositeness is in RP, and primality testing is in

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