 Load impedance

The load impedance $Z_L$ is the terminal electrical impedance of the receiving electrical load, at a stated frequency and operating condition. With electric current defined as entering the load's positive-voltage terminal, sinusoidal steady-state phasors obeyThe complex number records both the amplitude ratio and the phase difference. It belongs to the selected terminals and model; an arbitrary nonlinear device need not have a single amplitude-independent impedance.

A resistor gives $Z_L=R$. A series resistor and capacitor giveFor $R=1\mathrm{k\Omega }$, $C=1\mu \mathrm{F}$ and $f=1\mathrm{kHz}$, this is about $(1000-159.15\mathrm{i})\Omega$, with magnitude $1012.59\Omega$ and phase $-9.04^{\circ }$. Load electric current leads its terminal electric potential difference in this example. The component laws and phasor interpretation follow the sinusoidal circuit model.^[ref]

The load changes the source's operating point. A source with open-circuit phasor $V_s$ and series impedance $Z_s$ suppliesFor RMS phasors, the complex power entering the load is $S_L=V_L{I}_L^{\ast }$. Its real part is the mean delivered power,Using peak rather than RMS amplitudes would introduce a factor $1/2$ in that power expression.

An original resistive example has $V_s=1\mathrm{V}$ RMS and $R_s=1\mathrm{k\Omega }$. A $9\mathrm{k\Omega }$ load draws $0.100\mathrm{mA}$, receives $0.900\mathrm{V}$ and dissipates $0.090\mathrm{mW}$. A $1\mathrm{k\Omega }$ load instead receives $0.500\mathrm{V}$ and dissipates $0.250\mathrm{mW}$. More delivered power need not mean a smaller voltage error.

The input impedance of an instrument is a load when the instrument is connected to a source. High-input-impedance buffering reduces this interaction in voltage measurements.^[ref] Impedance bridging prioritizes preserving the source signal; impedance matching addresses other objectives such as maximum power transfer under its assumptions.