The planar process fabricates semiconductor devices from a common surface while retaining a protective oxide over the exposed ends of their p-n junctions. Jean Hoerni's patent describes selective openings in silicon dioxide for semiconductor doping and contacts, with oxide left over the p-n junctions. Protection and access are designed together; the surface is not simply stripped after fabrication. This was a distinct enabling contribution to the monolithic integrated circuit.[ref]
Method of manufacturing semiconductor devices by Jean Hoerni. Description, opening problem statement and Figs. 6–10, masking, retained oxide and contact openings
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