The J gate is , with . Prepare a fresh qubit in and apply the Controlled-Z gate between it and the input . The resulting state isMeasure the input in the equatorial qubit measurement basis . The unnormalized output isEach outcome has probability . Thus one-bit teleportation realizeson the new qubit. Apply the known Pauli X gate correction for the literal output, or keep the correction in a Pauli frame and adapt later measurements. The old qubit is measured, so this is not cloning the input.
Direct multiplication of the given matrices gives . The displayed negative exponent in the supplied relation has the wrong sign for exact matrix equality. The discrepancy is only a global phase in a fixed measurement branch, so it does not change this measurement implementation or its outcome probabilities. The positive-sign identity is used when tracking exact matrices.
An explicit measurement-based quantum computation pattern uses six vertices . Prepare a graph state with every vertex in and apply a Controlled-Z gate for each edgeThe first two links on each wire permit graph-state preparation of a computational-basis input followed by the logical J gate. Use the following single-qubit measurements:
All entangling edges can be made at preparation time because Controlled-Z gates commute. A future edge that does not touch a currently measured vertex can equivalently be deferred, which allows the one-bit teleportation identities to be applied in their logical order.
The two initial measurements implement with Pauli frames on the logical inputs. The first adaptive J gate then has output frame on . Propagating through gives framesup to branchwise global phase. The second adaptive J gate converts the latter intoA correction does not alter a computational-basis measurement, while an correction flips its bit. Consequently the deterministic classical postprocessing isThis reproduces the output-bit distribution of the original quantum circuit, including its known byproduct corrections.
Six-vertex graph state, adaptive equatorial measurements and classical parity correction for the two-wire circuit
. There is an additional simplification for these particular zero inputs. Since , , and , the exact final state is , independently of the angles. The requested bit is therefore fair. A single isolated graph-state vertex measured in already simulates that bit distribution; the six-vertex pattern also explicitly realizes the circuit and its corrections.
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