Encode by , , , , with reset to . Two positive-edge-triggered D flip-flops store the state. Minimizing the Boolean functions from the complete table gives
Equivalently, the minimal sum of products form of is . The displayed factorization saves duplicated logic. The equations use only AND gates, OR gates and NOT gates; connect to the corresponding flip-flop data input and use one common clock.
For example, with input gives , entering the pulse state. In , either gives or gives , independently of ; the pulse cannot persist. The four states are distinguishable by their current output or future response to inputs and , so two state bits are also necessary.

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