Past exam of the year 1 of the computer science course of the University of Oxford / 2021 / Digital systems, linear algebra, introduction to formal proof / 1 / d / Solution

Each stage has $J=K=1$ and therefore toggles. The printed clock symbols have no inversion bubble, so they are positive-edge triggered; each later clock is driven by the previous uncomplemented $Q$ output. Consequently the circuit is a ripple counter that counts down modulo eight. A zero least significant bit rises to one and propagates the transition; a one falls to zero and stops it. For example, the settled transition from $001$ is $000$, whereas $000$ is followed by $111$.

After $N$ input pulses the settled value is $(1-N)\mathrm{mod}8$, givingThe answers are $101$, $100$, and $000$, respectively, in most-significant-first order. Treating these as falling-edge stages would reverse the counting direction and would not follow the drawn clock symbols.