Share the input-history bits of (a) between a high-run detector and a low-run detector. With the two preceding input samples, put
(1)
These detector outputs are mutually exclusive. Feed them into (b). An explicit four-bit synchronous sequential circuit, with initial state , is
(2)
Every right-hand side uses the old state and the current input. In particular, the run detectors' combinational outputs are sampled by the toggle module at that same edge; there is no extra pipeline stage.
The first three consecutive high samples make at the third edge, toggling and clearing . Continuing high input cannot toggle it again. Only three consecutive low samples can make and rearm it; interrupted low runs do not suffice. After rearming, a new three-sample high run produces the next toggle. This proves the debounced toggle switch behaviour, including rejection of short high and low disturbances.
Figure 1.
The debounced toggle switch rejects interrupted runs, toggles on the third consecutive high sample, and rearms only on the third consecutive low sample; stored outputs are shown just after each clock edge
. Details.

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