Jean Hoerni Created 2026-10-18 Updated 2026-11-05
A semiconductor physicist who devised the planar process for manufacturing semiconductor devices. His patent uses an insulating surface coating while forming and protecting device junctions, making surface treatment part of reliable fabrication. This links the chemistry of a semiconductor surface to the repeatability and integration of electronic components.[ref]
Method of manufacturing semiconductor devices by Jean Hoerni. Patent description and claims: coated wafer, junction formation and device protection
Planar process 2026-10-18
The planar process fabricates semiconductor devices from a common surface while retaining a protective oxide over the exposed ends of their p-n junctions. Jean Hoerni's patent describes selective openings in silicon dioxide for semiconductor doping and contacts, with oxide left over the p-n junctions. Protection and access are designed together; the surface is not simply stripped after fabrication. This was a distinct enabling contribution to the monolithic integrated circuit.[ref]
Method of manufacturing semiconductor devices by Jean Hoerni. Description, opening problem statement and Figs. 6–10, masking, retained oxide and contact openings