Linear polynomial Updated 2025-07-16
A polynomial of degree 1, i.e. of form .
As of 2020, no one knows how to build the major desktop distros fully from source into the ISO, and especially so in a reproducible build way. Everything is done in build servers somewhere with complicated layers of prebuilds. It's crap.
Non-relativistic quantum mechanics Updated 2025-07-16
The first quantum mechanics theories developed.
Their most popular formulation has been the Schrödinger equation.
NoSQL Updated 2025-07-16
Turing complete Updated 2025-07-16
A computer model that is as powerful as the most powerful computer model we have: Turing machine!
Turing machine regex tape notation Updated 2025-07-16
Turing machine regex tape notation is Ciro Santilli's made up name for the notation used e.g. at:Most of it is just regular regular expression notation, with a few differences:
  • denotes the right or left edge of the (zero initialized) tape. It is often omitted as we always just assume it is always present on both sides of every regex
  • A, B, C, D and E denotes the current machine state. This is especially common notation in the context of the BB(5) problem
  • < and > next to the state indicate if the head is on top of the left or right element. E.g.:
    11 (01)^n <A 00 (0011)^{n+2}
    indicates that the head A is on top of the last 1 of the last sequence of n 01s to the left of the head.
This notation is very useful, as it helps compress long repeated sequences of Turing machine tape and extract higher level patterns from them, which is how you go about understanding a Turing machine in order to apply Turing machine acceleration.
x86 Paging Tutorial / Page faults Updated 2025-07-16
What if Process 1 tries to access 0x00003000, which is not present?
The hardware notifies the software via a Page Fault Exception.
When an exception happens, the CPU jumps to an address that the OS had previously registered as the fault handler. This is usually done at boot time by the OS.
This could happen for example due to a programming error:
int *is = malloc(1);
is[2] = 1;
but there are cases where it is not a bug, for example in Linux when:
  • the program wants to increase its stack.
    It just tries to accesses a certain byte in a given possible range, and if the OS is happy it adds that page to the process address space, otherwise, it sends a signal to the process.
  • the page was swapped to disk.
    The OS will need to do some work behind the processes back to get the page back into RAM.
    The OS can discover that this is the case based on the contents of the rest of the page table entry, since if the present flag is clear, the other entries of the page table entry are completely left for the OS to to what it wants.
    On Linux for example, when present = 0:
    • if all the fields of the page table entry are 0, invalid address.
    • else, the page has been swapped to disk, and the actual values of those fields encode the position of the page on the disk.
In any case, the OS needs to know which address generated the Page Fault to be able to deal with the problem. This is why the nice IA32 developers set the value of cr2 to that address whenever a Page Fault occurs. The exception handler can then just look into cr2 to get the address.
Why are pages 4 KiB anyways?
There is a trade-off between memory wasted in:
  • page tables
  • extra padding memory within pages
This can be seen with the extreme cases:
  • if the page size were 1 byte:
    • granularity would be great, and the OS would never have to allocate unneeded padding memory
    • but the page table would have 2^32 entries, and take up the entire memory!
  • if the page size were 4 GiB:
    • we would need to swap 4 GiB to disk every time a new process becomes active
    • the page size would be a single entry, so it would take almost no memory at all
x86 designers have found that 4 KiB pages are a good middle ground.
All with olive oil and salt mixed up before roasting.
2021-04-05 180C:
  • chestnuts: 1.5x 200g: 3x 6min, this was a bit too much
  • hazelnuts: 1.5x 200g: 3x 6min, seemed fine
  • pecans: 4.5x 200g bags: 5x 6 min, a bit uneven roast because too much on tray
2021-02-06 180C:
  • almonds: 2x 200g: 3x 6min, slighted burnt taste
  • Brazil nuts: 2x 300g: 3x 6min + 3min
  • chestnuts: 1x 400g: 3x 6min, perfect
  • pecans: 3x 200g bags (previously had done just 2 bags at a time): 3x 6 min + 2x 3min, perfect
2021-01-04:
  • almonds: 190C, 8 min, they started burning on top! What? I put olive oil abundantly this time. 170C 5 min
  • chestnuts: 180C, 6 min, stir, 6 min, stir, 4 min, they became very good, dark brown
  • pecans: 180C, 6 min, stir, 6 min, stir, 3 min while preparing chestnuts, very good
2020-11-21:
  • mixed nuts: 180C, 10 minutes, did not reach the point. Then 7 more minutes on 190C: pecans completely burned out
  • almonds: 190C, about 25 minutes, opened several times, in the end had a slight burnt taste, but did not get black, just darker brown. Not as crispy as the ones we buy roasted, but pretty good
  • pecans: 180C, 13 minutes, opened 3 times to stir, became great
x86 Paging Tutorial / PAE Updated 2025-07-16
Physical address extension.
With 32 bits, only 4GB RAM can be addressed.
This started becoming a limitation for large servers, so Intel introduced the PAE mechanism to Pentium Pro.
To relieve the problem, Intel added 4 new address lines, so that 64GB could be addressed.
Page table structure is also altered if PAE is on. The exact way in which it is altered depends on weather PSE is on or off.
PAE is turned on and off via the PAE bit of cr4.
Even if the total addressable memory is 64GB, individual process are still only able to use up to 4GB. The OS can however put different processes on different 4GB chunks.
Twin paradox Updated 2025-07-16
The key question is: why is this not symmetrical?
One answer is: because one of the twin accelerates, and therefore changes inertial frames.
But the better answer is: understand what happens when the stationary twin sends light signals at constant time intervals to each other. When does the travelling twin receives them?
By doing that, we see that "all the extra aging happens immediately when the twin turns around":
  • on the out trip, both twins receive signals at constant intervals
  • when the moving twin turns around and starts to accelerate through different inertial frames, shit happens:
    • the moving twin suddenly notices that the rate of signals from the stationary twin increased. They are getting older faster than us!
    • the stationary twin suddenly notices that the rate of signals from the moving twin decreased. They are getting older slower than us!
  • then when the moving twin reaches the return velocity, both see constant signal rates once again
Figure 1.
Twin paradox illustration with twins sending light signals at regular intervals
. Source.
Another way of understanding it is: you have to make all calculations on a single inertial frame for the entire trip.
Supposing the sibling quickly accelerates out (or magically starts moving at constant speed), travels at constant speed, and quickly accelerates back, and travels at constant speed setup, there are three frames that seem reasonable:
  • the frame of the non-accelerating sibling
  • the outgoing trip of the accelerating sibling
  • the return trip of the accelerating sibling
If you do that, all three calculations give the exact same result, which is reassuring.
Another way to understand it is to do explicit integrations of the acceleration: physics.stackexchange.com/questions/242043/what-is-the-proper-way-to-explain-the-twin-paradox/242044#242044 This is the least insightful however :-)
Bibliography:
History of the World Wide Web Updated 2025-07-16
Video 1.
Why web tech is like this by Steve Sanderson (2022)
Source.
MAC address Updated 2025-07-16
Hardcoded and unique network addresses for every single device on Earth.
Started with 48 bits (6 bytes), usually given as 01:23:45:67:89:AB but people now encouraged to use 64-bit ones.
How they are assigned: www.quora.com/How-are-MAC-addresses-assigned Basically IEEE gives out the 3 first bytes to device manufacturers that register, this is called the organizationally unique identifier, and then each manufacturer keeps their own devices unique.

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