Analog switch 2026-11-05
An analog switch uses a control signal to connect or disconnect an analog signal path. The control chooses the conducting state; the transmitted electric potential difference is not restricted to a binary logic value. Real devices have finite analog switch on-resistance, leakage and parasitic capacitance. The primary tutorial describes a bilateral CMOS switch formed from complementary transistors.[ref]
For an original loading example, connect an ideal source through a stipulated on-resistance to a load. The output is
The closed switch therefore changes the amplitude even before any switching transient is considered. This is a chosen resistor model, not a specification for a particular part. Variation of on-resistance with signal level can additionally produce distortion.
An open switch is also not an ideal infinite impedance. For example, a stipulated analog switch leakage current into changes the node potential at , or in a millisecond if that model remains valid. A high-impedance measurement can be sensitive to this small current.
On a bench, compare the transmitted level and the open-state drift with the same source, load and oscilloscope conditions. Analog switch charge injection concerns the control transition itself, while settling time concerns how long the complete circuit needs to approach its final value. Those effects are separate from the static conducting-state error.
Analog switch on-resistance is the conducting path's effective electrical resistance at a specified signal level, supply and temperature. In a locally resistive model, . It is neither an ideal short circuit nor necessarily constant as the signal moves. Complementary switch devices reduce signal-dependent resistance variation, as the manufacturer's circuit and curves illustrate.[ref]
An original example drives a load from an ideal source through . The voltage divider gives
If the analog switch on-resistance rises to elsewhere in the signal range, the ratio becomes , about below its first value. One gain correction cannot make both ratios exact. Switch on-resistance flatness therefore matters separately from the minimum resistance; variation with the signal can create nonlinearity.
The same resistance affects dynamics. A stipulated constant discharging has RC circuit time constant and requires to reduce an initial residual to one percent. This is a chosen single-pole model; amplifier dynamics can extend the actual integrator reset settling time.
On a bench, measure the terminal drop at known electric current while sweeping the signal level within the permitted range. Separate a nearly constant series loss from its signal-dependent variation. The source resistance and load belong in that measurement; the switch's control propagation delay is not its conducting-path resistance.
Switch on-resistance flatness describes how little an analog switch on-resistance changes across a stated analog signal range, at specified supply and temperature. A common measure is the peak-to-peak difference
The signal interval is part of the definition. A small minimum resistance does not establish good switch on-resistance flatness. Analog Devices illustrates how complementary transistor paths flatten the resistance curve and explains the distinction between fixed attenuation and signal-dependent distortion.[ref]
For an original quasistatic model, an ideal source drives a load through a switch with
Here the stipulated resistance law uses the source signal ; it is not a transistor model or a device specification. For , expansion gives
With , the identity yields
A constant gain correction cannot remove the generated third harmonic.
Taking , , and gives a resistance range10–12ohms and an approximate third-harmonic amplitude0.490millivolts. Its ratio to the fundamental is about0.050percent. This selected low-frequency calculation isolates a static nonlinearity; it omits switch capacitances and amplifier dynamics.
A practical test holds the switch on, applies a small known electric current, and sweeps the terminal signal level while measuring the conducting-path drop. Measuring several temperatures and supply conditions separates flatness over signal from changes between operating conditions. A second test with a sinusoidal source and Fourier analysis checks whether the complete circuit produces harmonics; source and readout distortion must be measured independently.