Digital counter ($c^{+}=(c+1)\mathrm{mod}M$)

A digital counter is a finite-state circuit that increments its stored value on each qualifying clock or event. A binary $w$-bit implementation naturally has modulus $2^w$. Dividing counted ticks by a known clock frequency gives a time interval, subject to wrap ambiguity and sampling accuracy.

A hardware timer uses a clock signal to measure intervals, commonly by a digital counter with capture or comparison facilities. A comparison event can request an interrupt or change an output directly. Counter resolution, wraparound, interrupt latency and the hardware's comparison semantics determine the timing guarantees available to software.