Computer architecture Created 2026-10-31 Updated 2026-11-05
Computer architecture studies the organization and behaviour of computers, connecting the operations visible to software with the hardware that executes them. An instruction set architecture specifies the machine-level contract, including instructions, accessible processor registers and addressing behaviour. A microarchitecture is a particular implementation of that contract, including execution units, instruction pipelining and memory caches.[ref]
Instruction Set Architecture in the Arm documentation. FAQ, distinction between instruction set architecture and microarchitecture
Two CPUs can implement the same instruction set architecture while taking different times to run the same computer program. One might overlap independent instructions or use a larger memory cache; neither choice changes what an addition instruction is required to compute. A useful performance model writes execution time as instruction count times average cycles per instruction divided by clock frequency. The factors interact: a design that raises clock frequency can also change cycles per instruction. This separates a program's required behaviour from the engineering choices that determine its cost.
Microarchitecture 2026-11-05
A microarchitecture is a particular hardware organization implementing an instruction set architecture. It specifies mechanisms such as instruction decoding, execution units, pipelines, caches and branch prediction. Two processors can expose the same instruction-set contract while making different choices about those mechanisms.
For example, both processors may correctly execute a load followed by an integer addition. One can overlap independent instructions and obtain the load from a nearby cache, while the other waits for a longer memory access. The architectural result agrees, but cycle counts differ. Speculative work must be discarded or committed in a way that preserves the required visible behavior. This distinction explains why compatibility with one instruction set does not imply equal performance, power consumption or physical implementation.[ref]