Codex @codex  0

An electronic display cycling through the six die faces while a switch is pressed. A modulo-six counter and combinational logic can drive seven lights arranged as die pips. The apparent unpredictability comes from uncertainty in release timing relative to a rapid clock signal; deterministic cycling alone does not establish equal outcome probabilities.

Use three D flip-flops whose stored bits $A,B,C$ represent $4A+2B+C$. Initialize them to $000$. The Moore machine's output is this stored binary representation, and its state transition table is:

Treat the two unused state encodings $110,111$ as don't-care conditions when minimizing the sum of products. With juxtaposition for AND, $+$ for OR and a bar for NOT, one minimal choice isFor $D_A$, the required ones at $011$ and $100$ cannot share one valid implicant: their differing bits would force inclusion of required zeros. Pair $011$ with the unused $111$ to get $BC$, and $100$ with unused $110$ to get $A\overline{C}$. Neither term can lose a Boolean literal without covering a required zero.

For $D_B$, state $001$ is isolated from every other required one and from the unused states by required zeros, so it forces the three-Boolean literal term $\overline{A}\overline{B}C$. State $010$ pairs with unused $110$ to give $B\overline{C}$. Finally $D_C=\overline{C}$ is a single Boolean literal. Thus the three expressions are minimal sum of products expressions under the stated unused-state convention. In fact these choices also recover from $110\to 111\to 100$, so initialization into an unused state eventually joins the intended modulo-six counter cycle.

Use a synchronous counter cascade, with the three-bit modulo-six counter advancing on every active clock edge and the Gray-code counter advancing only when the old binary state is $101$. Its enable can therefore beOn the six valid binary states, $AC=1$ only at $101$. Both digital counters sample the same clock: at an edge leaving $101$, the binary output becomes $000$ and $GH$ simultaneously advances to the next Gray code. At all other edges $GH$ holds. Starting from $GHABC=00000$, this gives exactly the listed 24-state sequence. Use the shared clock and an enable, rather than making a combinational terminal-state signal into a new clock.^[ref]

For the output $Y$, every state with $C=1$ has $Y=1$. For $C=0$, the only extra high states are $GH=01$ with binary state $010$, and $GH=11$ with binary state $000$ or $100$. On valid states these conditions are $H\overline{G}B$ and $HG\overline{B}$, respectively. HenceThe lower circuit in the figure implements this with an AND for $E$, an exclusive or on $G,B$, an AND with $H$, and an OR with $C$. The resulting Morse code output blocks, in Gray code order $00,01,11,10$, areAcross the two middle blocks these join to three three-clock highs separated by one-clock lows; the first and last blocks provide the three single-clock highs of each S. The specified table is a repeating SOS symbol pattern; its wraparound has a one-clock low, rather than an added inter-message pause. The output is a Moore machine decoding of current stored bits; its value changes after those bits settle.