For a finite CSP trace , let be its sequence of values on and its sequence of values on , with channel names removed. Restrict the external alphabet to these two channels. The behavioural CSP trace specification for an unbounded FIFO buffer is
where means prefix of a list, not merely subsequence. Outputs must therefore occur in input order, cannot duplicate or invent values, and cannot precede their inputs. Applying the condition to every CSP trace also checks every execution prefix.
For a legal , write , so is the pending FIFO queue content. Define the events that must remain available by
In addition to the CSP trace condition, require the behavioural CSP stable failure condition
Thus an unbounded FIFO buffer cannot stably refuse any new input, and a nonempty FIFO buffer cannot stably refuse its oldest pending output. An empty FIFO buffer can refuse every output. Readiness of an input and readiness of an output are required together; the environment may choose either. These conditions do not require an output while the environment refuses to accept it. In a CSP failures-divergences model specification, also exclude CSP divergence; the stable-readiness condition alone does not rule out an implementation that loops internally forever without reaching a CSP stable state.
First define the ordinary unbounded FIFO buffer:
Now use CSP internal choice to permit an immediate stop:
An execution choosing the first branch can perform every legal CSP trace satisfying the prefix of a list condition in part (a). Conversely that condition excludes all other CSP traces, so no process satisfying it can have more CSP traces. The second branch adds no new CSP trace, since the empty CSP trace is already present.
The second branch does add the CSP stable failure for any . This violates mandatory input readiness. Therefore the process has the maximum possible CSP trace set and fails the CSP stable failure specification. The qualification is , as is implicit for a useful FIFO buffer; with an empty value type there is no input-readiness event to violate. Maximizing the number of CSP traces does not pick a unique process in the finer models: other processes with the same complete legal CSP trace set and extra refusals also qualify.
If is injective, the equation is true:
For a CSP event , the original CSP parallel composition permits exactly when both operands can perform . After CSP event renaming, the corresponding rule requires the same image in both operands. Injectivity ensures that matching images came from the same event, and that an event outside cannot acquire the image of one inside . Independent transitions remain independent, and CSP internal actions are unchanged. Matching these transition rules gives a strong bisimulation, hence equality in all three standard CSP semantic models.
For a non-injective , the equation need not hold. Let
On the left, both events require synchronization but the other operand offers the wrong event, so . On the right, both renamed operands offer , which can synchronize:
The failure is already visible in the CSP traces model. A particular non-injective CSP event renaming may still preserve a particular composition; it is the unrestricted equivalence that fails.
Write . The following five CSP operational semantics rules suffice, with always visible:
Thus a CSP internal action of either operand preserves the wrapper. A visible action outside by the left operand also preserves it, whereas such an action by the right operand performs an ordinary CSP interrupt and discards the left operand. An action in requires both operands and advances both without discarding either. If both can perform the same event outside , there are two transitions with the same visible label and potentially different derivatives; neither should be deleted. The paper excludes successful termination, so no extra termination rules are needed.
Suppose the operands are initially stable and written in CSP external choice normal form,
The CSP step law is
An empty indexed CSP external choice denotes . A label appearing in both of the first two lines must retain both continuations: after that common label the result is the CSP internal choice between the continuations. A label in appears only in the third line and only if both operands offer it. These are exactly the three visible-transition rules from part (d); the two CSP internal action rules handle operands that are not initially stable.
As a check, for the paper's example the initial shared leads to . Its expansion is
which recovers the displayed example after prefixing by .
Use fresh event tags to tell apart an action by and an interrupting action by . Put and introduce a disjoint copy . Let fix and map each to , and put . Define a process that always accepts an event from by
and an ordinary CSP interrupt handler by
Finally let fix every original event and send back to . A simulation containing no occurrence of the new operator is
Here is the ordinary CSP interrupt, and the CSP event renaming is applied after the CSP parallel composition. It is non-injective, so part (c) explains why moving it inside would be unsafe.
Before the interrupt, 's events in synchronize with on the same events. Its events outside are unprimed and do not synchronize with . Meanwhile 's events outside are primed; they synchronize with and thereby interrupt and discard . After the first such event, the left operand is , so it imposes no further restriction on ; final CSP event renaming then yields exactly the remaining behaviour of .
For a formal strong bisimulation, relate a pre-interrupt state to
and an already-interrupted state to
The three visible cases match the rules in part (d), including both transitions when both operands offer the same event outside . A CSP internal action of never activates , while a CSP internal action of remains possible exactly until the interrupt. The controller adds no CSP internal actions. Thus transitions match in both directions and related derivatives remain related.
Consequently this simulation is stronger than merely CSP trace equivalent:
It preserves CSP stable states, their enabled-event sets and their CSP stable failures, and matches every possible infinite run of CSP internal actions. In particular, it introduces neither a premature commitment nor a new CSP divergence. A different simulation that guesses an interrupt with a hidden handshake would need a separate refusal analysis; the visible tagging construction above needs no hidden handshake.

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