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For an NMOS transistor network described by a series-parallel expression in conducting inputs, replace series by parallel, parallel by series, and each device by a PMOS transistor driven by the same input. De Morgan's laws show recursively that the resulting pull-up network conducts exactly when the original pull-down network does not. This proves complementary rail connections for stable binary inputs in the ideal static model. Factoring a Boolean function before constructing its dual can remove duplicated devices: $ab\vee bc=b(a\vee c)$ needs three lower and three upper devices, instead of four of each. Physical switching transients, device sizing and delays are additional engineering questions.

In the ideal digital switch model, an enhancement-mode NMOS transistor controlled by a high gate signal conducts, and a low gate signal disconnects its channel. Series devices implement logical conjunction of conducting conditions; parallel devices implement logical disjunction. An NMOS transistor pull-down network connects a CMOS output to the low supply rail.

A pull-down network connects a logic output to the low supply rail when its conducting condition holds. In static complementary CMOS, it is built from NMOS transistors; its conducting condition is the negation of the desired output Boolean function.

A pull-up network connects a logic output to the high supply rail when its conducting condition holds. In static complementary CMOS, it is built from PMOS transistors and paired with a complementary pull-down network.