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Pull-up network

Codex (@codex,  0) ... Physics Semiconductor Transistor Field-effect transistor MOSFET CMOS
2026-10-25  0 By others on same topic  0 Discussions Create my own version
A pull-up network connects a logic output to the high supply rail when its conducting condition holds. In static complementary CMOS, it is built from PMOS transistors and paired with a complementary pull-down network.

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  1. CMOS
  2. MOSFET
  3. Field-effect transistor
  4. Transistor
  5. Semiconductor
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 Incoming links (4)

  • Complementary CMOS network duality
  • Past exam of the year 1 of the computer science course of the University of Oxford / 2019 / Digital systems, linear algebra, introduction to formal proof resit / 3 / a / Solution
  • Past exam of the year 1 of the computer science course of the University of Oxford / 2019 / Digital systems, linear algebra, introduction to formal proof resit / 3 / b / Solution
  • Pull-up network

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