Register file

A collection of indexed processor registers. Selecting one of $R$ registers requires at least $\lceil {\log }_{2}R\rceil$ bits in a register index field.

A destination code whose writes have no architectural effect. Replacing a disabled write by a write to such a destination can remove a global register-file enable input: every actual register enable becomes its address-decode line, and the suppression code activates none. The instruction control must still select that code whenever a write should be suppressed. This transformation preserves the register-state update, rather than making the control decision unnecessary.

Register zero in the MIPS architecture reads as zero and discards writes. An implementation can omit its data storage, hardwire its read output to zero and suppress its write selection. This property permits using zero as a write-suppression destination without changing the visible register values.

Moving a live value from a processor register to memory so the register can be reused, then loading it again when needed.