Determines energy. This comes out directly from the resolution of the Schrödinger equation solution for the hydrogen atom where we have to set some arbitrary values of energy by separation of variables just like we have to set some arbitrary numbers when solving partial differential equations with the Fourier series. We then just happen to see that only certain integer values are possible to satisfy the equations.
React setups:
One problem with Django is that it does not expose its ORM as an external library: stackoverflow.com/questions/33170016/how-to-use-django-1-8-5-orm-without-creating-a-django-project which is wasteful of development time.
Information about ARM paging can be found at: cirosantilli.com/linux-kernel-module-cheat#arm-paging
Besides a missing page, a very common source of page faults is copy-on-write (COW).
Page tables have extra flags that allow the OS to mark a page a read-only.
Those page faults only happen when a process tries to write to the page, and not read from it.
When Linux forks a process:
- instead of copying all the pages, which is unnecessarily costly, it makes the page tables of the two process point to the same physical address.
- it marks those linear addresses as read-only
- whenever one of the processes tries to write to a page, the makes a copy of the physical memory, and updates the pages of the two process to point to the two different physical addresses
Multiple addresses translate to a single physical address by Ciro Santilli 34 Updated 2024-12-15 +Created 1970-01-01
The same linear address can translate to different physical addresses for different processes, depending only on the value inside
cr3
.Both linear addresses
00002 000
from process 1 and 00004 000
from process 2 point to the same physical address 00003 000
. This is completely allowed by the hardware, and it is up to the operating system to handle such cases.This often in normal operation because of Copy-on-write (COW), which be explained elsewhere.
Such mappings are sometime called "aliases".
Why are pages 4KiB anyways?
There is a trade-off between memory wasted in:
- page tables
- extra padding memory within pages
This can be seen with the extreme cases:
- if the page size were 1 byte:
- granularity would be great, and the OS would never have to allocate unneeded padding memory
- but the page table would have 2^32 entries, and take up the entire memory!
- if the page size were 4GiB:
- we would need to swap 4GiB to disk every time a new process becomes active
- the page size would be a single entry, so it would take almost no memory at all
x86 designers have found that 4KiB pages are a good middle ground.
Multi-level paging scheme numerical translation example by Ciro Santilli 34 Updated 2024-12-15 +Created 1970-01-01
Page directory given to process by the OS:
entry index entry address page table address present
----------- ---------------- ------------------ --------
0 CR3 + 0 * 4 0x10000 1
1 CR3 + 1 * 4 0
2 CR3 + 2 * 4 0x80000 1
3 CR3 + 3 * 4 0
...
2^10-1 CR3 + 2^10-1 * 4 0
Page tables given to process by the OS at
PT1 = 0x10000000
(0x10000
* 4K):entry index entry address page address present
----------- ---------------- ------------ -------
0 PT1 + 0 * 4 0x00001 1
1 PT1 + 1 * 4 0
2 PT1 + 2 * 4 0x0000D 1
... ...
2^10-1 PT1 + 2^10-1 * 4 0x00005 1
Page tables given to process by the OS at where
PT2 = 0x80000000
(0x80000
* 4K):entry index entry address page address present
----------- --------------- ------------ ------------
0 PT2 + 0 * 4 0x0000A 1
1 PT2 + 1 * 4 0x0000C 1
2 PT2 + 2 * 4 0
...
2^10-1 PT2 + 0x3FF * 4 0x00003 1
PT1
and PT2
: initial position of page table 1 and page table 2 for process 1 on RAM.With that setup, the following translations would happen:
linear 10 10 12 split physical
-------- -------------- ----------
00000001 000 000 001 00001001
00001001 000 001 001 page fault
003FF001 000 3FF 001 00005001
00400000 001 000 000 page fault
00800001 002 000 001 0000A001
00801004 002 001 004 0000C004
00802004 002 002 004 page fault
00B00001 003 000 000 page fault
Let's translate the linear address
0x00801004
step by step:- In binary the linear address is:
0 0 8 0 1 0 0 4 0000 0000 1000 0000 0001 0000 0000 0100
- Grouping as
10 | 10 | 12
gives:which gives:0000000010 0000000001 000000000100 0x2 0x1 0x4
So the hardware looks for entry 2 of the page directory.page directory entry = 0x2 page table entry = 0x1 offset = 0x4
- The page directory table says that the page table is located at
0x80000 * 4K = 0x80000000
. This is the first RAM access of the process.Since the page table entry is0x1
, the hardware looks at entry 1 of the page table at0x80000000
, which tells it that the physical page is located at address0x0000C * 4K = 0x0000C000
. This is the second RAM access of the process. - Finally, the paging hardware adds the offset, and the final address is
0x0000C004
.
Page faults occur if either a page directory entry or a page table entry is not present.
The Intel manual gives a picture of this translation process in the image "Linear-Address Translation to a 4-KByte Page using 32-Bit Paging": Figure 1. "x86 page translation process"
Why do the up ad down quarks have different masses? by Ciro Santilli 34 Updated 2024-12-15 +Created 1970-01-01
Some notable ones:
- Proxima Centauri, the nearest one, at 4 ly. It is part of the Alpha Centauri star system, which contains two other stars at very similar distances as well, and their relative distances to earth will change positions in a few tens of thousands of years.
- Sirius, the brightest star in the sky at 9 ly
Each transaction isolation level specifies what can or cannot happen when two queries are being run in parallel, i.e.: the memory semantics of the system.
Remember that queries can affects thousands of rows, and database systems like PostgreSQL can run multiple such queries at the same time.
Good summary on the PostgreSQL page: www.postgresql.org/docs/14/transaction-iso.html
Implementation specifics:
PostgreSQL feels good.
Its feature set is insanely large! Just look at stuff like: stackoverflow.com/questions/1986491/sql-split-string-by-space-into-table-in-postgresql/1993058#1993058
Had a look at the source tree, and also felt good.
If Oracle is the Microsoft of database, Postgres is the Linux, and MySQL (or more precisely MariaDB) is the FreeBSD (i.e. the one that got delayed by legal issues). Except that their software licenses were accidentally swapped.
The only problem with Postgres is its name. PostgreSQL is so unpronounceable and so untypeable that you should just call it "Postgres" like everyone else.
It is so mind blowing that people believed in this theory. How can you think that, when you turn on a lamp and then you see? Obviously, the lamp must be emitting something!!!
Then comes along this epic 2002 paper: pubmed.ncbi.nlm.nih.gov/12094435/ "Fundamentally misunderstanding visual perception. Adults' belief in visual emissions". TODO review methods...
A fundamental component of three-level lasers.
As mentioned at youtu.be/_JOchLyNO_w?t=581 from Video "How Lasers Work by Scientized (2017)", they stay in that state for a long time compared to non spontaneous emission of metastable states!
phys.libretexts.org/Courses/University_of_California_Davis/UCD%3A_Physics_9HE_-_Modern_Physics/06%3A_Emission_and_Absorption_of_Photons/6.3%3A_Lasers mentions that they are kept in that excited state due to selection rules.
This is also one of mechanisms behind phosphorescence with triplet states.
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