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A junction field-effect transistor controls a conducting semiconductor channel using reverse-biased p-n junctions at its gate. Changing gate voltage changes the depletion region and therefore the cross-section available to mobile charge carriers. A depletion-mode n-channel device normally conducts at zero gate-source voltage and is depleted by a more negative gate. The small reverse gate electric current gives high input resistance, while a source-drain supply provides output power.

A field-effect transistor uses a gate voltage to control the conducting channel between source and drain. In a MOSFET, the gate is insulated from the semiconductor: an electric field changes the channel carrier population with little steady gate current. An n-channel device creates an semiconductor inversion layer when the gate sufficiently attracts electrons to a p-type surface. The drain supply provides the output power; the gate controls that flow.

The long-channel MOSFET current law follows from the gradual-channel approximation. With gate capacitance per area $C_{\mathrm{ox}}$, threshold voltage $V_T$, channel width $W$, length $L$, constant charge carrier mobility $\mu$ and $V_{mov}=V_{GS}-V_T>0$, the local sheet charge magnitude is $C_{\mathrm{ox}}(V_{mov}-V(x))$. Integrating the drift current along the channel givesAt $V_{DS}=V_{mov}$, the drain end reaches pinch-off. The ideal long-channel saturation current is $I_D=\mu C_{\mathrm{ox}}W{V}_{mov}^2/(2L)$; this assumes negligible channel-length modulation. A junction field-effect transistor instead changes the channel width through a reverse-biased depletion region.

Experimentally, measure $I_D$ against $V_{GS}$ at fixed drain bias to see gate control, and against $V_{DS}$ at several fixed gate biases to distinguish the approximately linear and saturation regimes. Simultaneously checking gate leakage tests the insulated-gate assumption.

A junction field-effect transistor has a conducting channel between source and drain, with gate regions forming reverse-biased p-n junctions to that channel. In an n-channel device, a more negative gate-source electric potential difference increases the reverse bias and widens the depletion region. The conducting cross-section shrinks, reducing the drain electric current. The gate ideally draws only a small leakage electric current, giving a high input resistance; the source-drain supply provides the controlled output power. Carrier motion in a p-channel device reverses the relevant polarities.

At small positive $V_{DS}$, the channel conducts approximately as a resistor. As the potential rises from source to drain, the local gate-channel reverse bias increases toward the drain. The depletion layers are therefore thicker there. For a symmetric n channel of half-thickness $a$, uniformly doped at density $N_D$, the one-sided depletion approximation giveswhere $w$ is the depletion width from each side and $V_{\mathrm{bi}}$ the built-in junction potential. The neutral channel closes locally when $w=a$. Define the positive geometrical depletion electric potential difference $U_P=e{N}_D{a}^2/(2{\epsilon }_s)$. The approximate drain-end pinch-off condition isMore negative gate bias makes this saturation occur at a smaller drain electric potential difference.

Pinch-off in a junction field-effect transistor does not mean that the drain electric current vanishes. Electrons arriving through the remaining neutral channel are swept across the high-field depleted region into the drain. Further increases in $V_{DS}$ mostly fall across that region, so the electric current changes only weakly: this is the saturation regime used for amplification. Channel shortening gives a finite output slope in real devices. Excessive reverse electric potential difference eventually causes breakdown, beyond the normal saturation model.

A sufficiently negative gate electric potential difference can instead deplete the entire channel from the source end and produce cutoff. In the simplified geometry its threshold is $V_{GS,\mathrm{off}}\simeq V_{\mathrm{bi}}-U_P<0$. A commonly used approximate transfer law in saturation isHere $I_{DSS}$ is the saturated drain electric current at zero gate-source bias. The square law is a useful device approximation, not an exact result for arbitrary channel profiles. It connects field control of depletion to a measurable transfer characteristic while keeping drain-end pinch-off distinct from complete gate cutoff.

In an n-channel junction field-effect transistor, increasing drain voltage increases the local gate-channel reverse bias near the drain. The depletion region can meet there, ending the quasi-neutral channel before the drain. Carriers already in the channel are swept across the remaining high-field region, so drain-end pinch-off produces current saturation rather than zero current. A sufficiently negative gate voltage can instead deplete the whole channel and cut the device off. In the one-sided depletion approximation, a channel half-width $a$ and donor density $N_D$ give a depletion threshold voltage $U_P=e{N}_D{a}^2/(2{\epsilon }_s)$; with built-in junction voltage $V_{\mathrm{bi}}$, drain-end pinch-off occurs approximately at $V_{DS}=U_P-V_{\mathrm{bi}}+V_{GS}$.