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The group delay introduced by a capacitive amplifier load is the negative angular frequency derivative of the extra wave phase produced by that load. For the resistive output model in reactive-load phase shift in a finite-output-impedance amplifier, divide the loaded transfer function by the unloaded one:The added group delay is thereforeThis subtraction of unloaded wave phase prevents the amplifier's intrinsic group delay from being attributed to the capacitor. The terminal model uses a Thévenin equivalent; the group delay definition differentiates an unwrapped wave phase, as in the SciPy signal-processing documentation. Its digital-filter function reports samples, whereas the analog derivative above uses radians per second and gives seconds.^[ref][ref]

For an original example, choose $R=200\Omega$ and $C=10\mathrm{nF}$, hence $\tau =2\mu \mathrm{s}$. At $\omega \tau =1$, corresponding to $f=1/(2\pi \tau )\approx 79.6\mathrm{kHz}$, the added group delay is $1\mu \mathrm{s}$. The same operating point has $-{\varphi }_{\mathrm{rel}}/\omega =\pi \tau /4\approx 1.571\mu \mathrm{s}$: a single sinusoid's phase displacement and the delay of a narrow frequency packet need not agree.

A practical test applies a weakly modulated carrier, varies its central frequency, and measures the output modulation displacement while comparing loaded and unloaded operation. The group delay describes that narrow-band envelope only when the frequency response varies slowly across its bandwidth. The corresponding causal impulse response begins at zero time, $h(t)=e^{-t/\tau }/\tau$ for $t\ge 0$, and vanishes for $t<0$; it is not a rigidly translated impulse. Thus group delay versus pulse-front arrival for an RC load matters when a measured pulse is broad enough to change shape.

Loaded voltage gain is the ratio of an amplifier's output to input signal electric potential differences with a specified load connected. In a small-signal model, let the open-circuit output be $v_{\mathrm{oc}}=A_0{v}_{\mathrm{in}}$ and let the complete amplifier have output impedance $Z_o$. A load $Z_L$ then givesThis is the voltage divider result from Thévenin's theorem at the output terminals. The university source explains why a linear circuit can be replaced at specified terminals by a source and series impedance.^[ref] The output impedance used here must describe the complete amplifier at the stated operating point and frequency, including its feedback.

The input terminal matters too. For a generator $v_s$ with source impedance $Z_s$ driving amplifier input impedance $Z_i$, the corresponding source-to-load ratio in a unilateral model isThis includes both input and output loading; it differs from the terminal-to-terminal voltage gain defined above.

For an original resistive example, choose $A_0=12$, $Z_o=100\Omega$, $Z_L=900\Omega$, $Z_i=1\mathrm{k\Omega }$ and $Z_s=50\Omega$. The loaded terminal gain is $10.8$, while the source-to-load gain is $72/7\approx 10.286$. Reducing the load to $100\Omega$ makes the terminal gain six, even though the stipulated open-circuit gain remains twelve. These are model parameters, not device specifications.

A direct test holds the actual amplifier input signal fixed, changes a known load and measures the output with an oscilloscope whose probe impedance is included in the effective load. Use small enough signals to retain linear operation and respect the amplifier output range. If the output-to-input ratio changes with loading, an unloaded gain alone is insufficient to predict the circuit's behavior.

At nonzero frequency the impedances and gain can be complex. A reactive-load phase shift in a finite-output-impedance amplifier can change both magnitude and phase, while input-output coupling or nonlinear current limiting can invalidate this simple unilateral divider model. The ideal feedback resistance-ratio examples in the manufacturer's introduction apply within their corresponding operating assumptions.^[ref]