Why are pages 4 KiB anyways?

There is a trade-off between memory wasted in:

This can be seen with the extreme cases:

x86 designers have found that 4 KiB pages are a good middle ground.

The problem with a single-level paging scheme is that it would take up too much RAM: 4G / 4K = 1M entries per process.

If each entry is 4 bytes long, that would make 4M per process, which is too much even for a desktop computer: ps -A | wc -l says that I am running 244 processes right now, so that would take around 1GB of my RAM!

For this reason, x86 developers decided to use a multi-level scheme that reduces RAM usage.

The downside of this system is that is has a slightly higher access time, as we need to access RAM more times for each translation.

Learned readers will ask themselves: so why use an unbalanced tree instead of balanced one, which offers better asymptotic times en.wikipedia.org/wiki/Self-balancing_binary_search_tree?

Likely:

Name origin: amnion, a pellicle that covers embryos of both eggs and also during pregnancy.

Includes:

Does not include amphibians. If you include them, you have the tetrapods.

Allows us to draw with JavaScript pixel by pixel! Great way to create computational physics demos!

Here is an animation demo with some useful controls:

new class extends OurbigbookCanvasDemo {
  init() {
    super.init('hello');
    this.pixel_size_input = this.addInputAfterEnable(
      'Pixel size',
      {
        'min': 1,
        'type': 'number',
        'value': 1,
      }
    );
  }
  draw() {
    var pixel_size = parseInt(this.pixel_size_input.value);
    for (var x = 0; x < this.width; x += pixel_size) {
      for (var y = 0; y < this.height; y += pixel_size) {
        var b = ((1.0 + Math.sin(this.time * Math.PI / 16)) / 2.0);
        this.ctx.fillStyle =
          'rgba(' +
          (x / this.width) * 255 + ',' +
          (y / this.height) * 255 + ',' +
          b * 255 +
          ',255)'
        ;
        this.ctx.fillRect(x, y, pixel_size, pixel_size);
      }
    }
  }
}

Bibliography: developer.mozilla.org/en-US/docs/Web/API/Canvas_API/Tutorial/Basic_animations">https://developer.mozilla.org/en-US/docs/Web/API/Canvas_API/Tutorial/Basic_animations

x86's multi-level paging scheme uses a 2 level K-ary tree with 2^10 bits on each level.

Addresses are now split as:

Then:

One reason for using 10 bits on the first two levels (and not, say, 12 | 8 | 12 ) is that each Page Table entry is 4 bytes long. Then the 2^10 entries of Page directories and Page Tables will fit nicely into 4Kb pages. This means that it faster and simpler to allocate and deallocate pages for that purpose.

After a translation between linear and physical address happens, it is stored on the TLB. For example, a 4 entry TLB starts in the following state:

The > indicates the current entry to be replaced.

And after a page linear address 00003 is translated to a physical address 00005, the TLB becomes:and after a second translation of 00007 to 00009 it becomes:

Now if 00003 needs to be translated again, hardware first looks up the TLB and finds out its address with a single RAM access 00003 --> 00005.

Of course, 00000 is not on the TLB since no valid entry contains 00000 as a key.

Page size extension.

Allows for pages to be 4M (or 2M if PAE is on) in length instead of 4K.

PSE is turned on and off via the PSE bit of cr4.

The Linux kernel makes extensive usage of the paging features of x86 to allow fast process switches with small data fragmentation.

There are also however some features that the Linux kernel might not use, either because they are only for backwards compatibility, or because the Linux devs didn't feel it was worth it yet.

In v4.2, look under arch/x86/:

There seems to be no structs defined to represent the pages, only macros: include/asm/page_types.h is specially interesting. Excerpt:

arch/x86/include/uapi/asm/processor-flags.h defines CR0, and in particular the PG bit position:

Paging is done by the Memory Management Unit (MMU) part of the CPU.

Like many others (e.g. x87 co-processor, APIC), this used to be by separate chip on early days.

It was later integrated into the CPU, but the term MMU still used.

Convert virtual addresses to physical from user space with /proc/<pid>/pagemap and from kernel space with virt_to_phys:

Dump all page tables from userspace with /proc/<pid>/maps and /proc/<pid>/pagemap:

Read and write physical addresses from userspace with /dev/mem:

Ah, the Holy Grail of both biology and computer science!

Ciro Santilli feels it is not for his generation though, and that is one of the philosophical things that saddens him the most in this world.

On the other hand, Ciro's playing with the Linux kernel and other complex software which no single human can every fully understand cheer him up a bit. But still, the high level view, that we can have...

For now, Ciro's 2D reinforcement learning games.

This being a class is bullshit because it is not a clade, notably birds are not considered reptiles, but they are clearly in the clade.

By cranks:

After removing it:

Of course, we already knew that minimal plaster work would be needed from the start, since we have to hammer two small nails into the wall. But that level of damage might have been easily dealt with by a non-professional tenant himself. But the level I had was a bit more than I felt I should handle myself.